Generator capable of producing multiple signals with different frequencies and a transmitter which includes a signal generator of this kind

ABSTRACT

In accordance with the present invention, a signal generator providing multiple signals with different frequencies includes, in a combined form, a clock (1), an address counter (2), a memory (3), and a digital-to-analog converter (4), which are to be series-connected. Individual storage locations within the memory (3) shall be preloaded with amplitude samples for the entire group of signals with different frequencies, which are to be selected in such a manner that storage locations in use within the aforementioned memory (3) shall contain an integral number of cycles for each signal. The address counter (2), which is controlled by the clock (1), shall successively address each storage location within the memory (3), and a capacitor (5) connected to the converter output shall be used to smooth the resulting signal. Applicable for systems permitting prompt transmission of multiple messages within railway systems, by use of contact ramps.

The present invention pertains to a generator which is capable ofproducing multiple signals with different frequencies and, inparticular, is suitable for prompt transmission of multiple messages forrailway applications. Prior art includes a method of prompt messagetransmission for railway systems involving use of contact ramps withinsets of tracks.

This type of message transmission system usually consists of a unitinstalled aboard a train which includes, on one hand, a transmitterconstantly sending multiple signals with different frequencies along twoconducting wires, and on the other hand, a signal detector which isconnected to the two conducting wires.

In turn, one of the conducting wires is connected to a trackway by meansof at least one of the train's wheels, whereas the other wire isconnected to a collector shoe.

At specific locations on the ground, each contact ramp is connected tothe trackway by means of at least one resonant circuit in such a mannerthat shunting of the detector shall occur during contact between thecollector shoe and the contact ramp. Accordingly, when the train travelspast the contact ramp, the detector ceases to detect the signal whosefrequency matches the frequency of the aforementioned resonant circuit.

The absence of a signal with a specific frequency or the absence of acombination of signals with specific frequencies is then interpretedaboard the train. This situation can represent the status of the signallight which the train has most recently passed, or the distance which itmust travel until the next signal light, for example. This type ofsystem offers the advantage of being composed of entirely unenergizedcomponents at the ground level. Accordingly, maintenance is notrequired.

In accordance with state of the art methods, thirty-two signals withdifferent frequencies can be employed for a system of this type, andthese signals are generated by thirty-two parallel-connectedoscillators.

An object of the present invention is simplification of the transmitterwithin the previously cited system, by use of a generator which shallinclude only one clock.

In summary, with the present invention, the aforementioned generatorshall include a clock, an address counter, a memory, and adigital-to-analog converter. The memory shall be preloaded according toindividual storage locations, so that an amplitude sample for the entiregroup of signals being transmitted with different frequencies shall bestored in each one. In turn, the address counter, which is controlled bythe clock, shall successively address each of the storage locationsbeing used within the memory, where the output terminal shall providethe sample amplitude for the entire group of signals in a digital form.The digital-to-analog convertor shall then allow production of a sampleanalog signal which is to be equivalent to the entire group of signalsbeing transmitted. A capacitor shall also be included, for smoothing theanalog signal which is to be obtained. In order for the signal generatorto function properly, frequencies for each signal must be selected insuch a manner that the number of cycles stored within the memory shallbe an integer.

From another perspective, the present invention likewise pertains to atransmitter intended for a prompt message tranmission system for railwayapplications, whereby a generator shall be capable of producing multiplesignals with different frequencies, characterized by the fact that onlyone clock and a series of parallel-connected branches shall be combined,with each branch containing a series consisting of a read-only memory, adigital-to-analog converter, and a resistor. A smoothing capacitor andan amplifier shall be connected to the output for each branch. Parallelmemory-loading shall be performed according to individual storagelocations, in order to allow storage of an amplitude sample for aportion of the previously cited signals with different frequencies whichhave been selected in such a manner that the aforementioned storagelocations shall contain an integral number of cycles for each signal. Inturn, each address counter, which shall be controlled by the clock,shall successively address each of the storage locations being utilizedwithin the particular branch to which the address counter is connected.

The subsequent non-restrictive description, which is accompanied by aset of diagrams, shall permit fuller understanding of the presentinvention, as well as providing a clearer indication of other purposes,advantages, and characteristics of said invention.

FIG. 1 is a diagram representing a signal generator designed inaccordance with the present invention.

FIG. 2 is a diagram representing a transmitter for a prompt transmissionsystem for multiple messages, intended for railway applications. Thisparticular transmitter makes use of a signal generator designed inaccordance with the present invention.

Within the previously cited diagrams, a signal generator of the type towhich this invention pertains essentially consists of a clock (1), andaddress counter (2), a read-only memory (3), and a digital-to-analogconverter (4), which are to be series-connected, along with a capacitor(5) which is to be connected to the converter output (4), for thepurpose of smoothing the output signal. The output signal shall consistof the sum of multiple sinusoidal signals with different frequencies. Inturn, each storage location within the read-only memory (3) shallcontain in a digital form a sample of the amplitude of the entire groupof signals with frequencies differing from the frequency of the outputsignal. Reading of the memory (3) shall be performed without difficultybecause of an address counter (2) which shall successively address eachof the storage locations being utilized within the memory (3). Theaddress counter shall be controlled by a clock (1), such as a quartzclock.

The output signal furnished by the memory shall subsequently beconverted by the digital-to-analog converter (4), so as to obtain ananalog output signal which is essentially identical to the sum of thesinusoidal signals with different frequencies, for which amplitudesamples shall have been preloaded within the memory (3) in a digitalform.

As indicated within FIG. 2, which represents a transmitter for a promptmessage transmission system intended for railway applications, theentire system is controlled by a clock (1). In this instance, thetransmitter consists of two branches, and each branch includes a seriesconsisting of an address counter (21, 22), a read-only memory (31, 32),and a digital-to-analog converter (41, 42). The resistors identified as(51) and (52) and the capacitor identified as (53) are respectivelyintended to allow integration of signals emanating from each branch andsmoothing of these signals. The signal which is obtained is transmittedto an input terminal within an amplifier (6) whose output terminal (7)shall, for example, be connected to an isolating transformer which doesnot appear within the diagram. The terminals on the secondary windingwithin this transformer shall function as the output terminal of thepreviously cited transmitter.

According to one embodiment of the present invention, the transmitter isdesigned so as to transmit thirty-two signals with differentfrequencies, which shall differ from one another by approximately 10percent. In addition, there shall be a quartz clock operating a 12 MHz.

In order to obtain a continuous signal, it is necessary for the samplestored within the first storage location of the memory to fit togetherwith the sample stored within the last storage location. In other words,an integral number of cycles must be stored for each signal. If theminimum frequency of the signals which are to be transmitted isequivalent to approximately 3000 Hz, it is sufficient to install a 16-divider, which does not appear within the diagram, at the clock outputand to store the signal amplitudes in 250 storage locations within thememory (31) during nine alternations. Hence, it is possible to use 2250storage locations. It is easy to provide this configuration inasmuch as4,000-octet memories and suitable dividers are commercially available.The address counter must therefore be preset so that it shall only scana portion of the memory field. In order for amplitudes stored at variouslocations within the memory (31) to match one another, it is necessaryto select signals which likewise permit storage of an integral number ofcycles within the same number of storage locations.

When a minimum frequency of 3,000 Hz is selected, it is possible tostore nine cycles within the memory. The frequencies of other signalspermit storage of ten, eleven, and twelve cycles, for example. Then itis possible to select the following frequencies: 3333.33 Hz, 3666.67 Hz,and 4000 Hz, with an average separation of approximately 10 percent. Inorder to maintain a similar average separation among the differentfrequencies, it then becomes necessary to make use of a higher octave(6000 Hz, 6666.67 Hz, and 8000 Hz, respectively).

For this particular embodiment of the present invention, the sampleamplitudes for sixteen signals with different frequencies have beenstored at storage locations within both of the memories identified as(31) and (32).

By applying the same concepts, 3024 storage locations are used withinthe memory identified as (32), and minimum frequencies of 4464.23 Hz,4960.32 Hz, and 5456.35 Hz have been selected, in order to permitstorage of nine, ten, and eleven signal cycles within the memory.

It is possible to use only one memory within this type of transmitter,although, in this particular instance, the output signal is not clearlydefined and the signal-to-noise ratio is unsuitable, on account of thefact that the output signal shall be generated in a staggered form.Hence, it is preferable to limit the number of signals with differentfrequencies which are to be stored in each memory and to provide severalidentical parallel-connected branches, whose outputs shall be connectedto an analog integration circuit.

Although the preceding description pertains solely to the preferredembodiment of the present invention, it is obvious that anymodifications introduced for the same purposes by technicallyknowledgeable persons would not represent departures from the context ofthis invention. In particular, the number of sections for thetransmitter described heretofore is not restricted to two sections.

What is claimed is:
 1. Signal generator apparatus comprising a memoryhaving storage locations storing, in digital form, successive samples ofthe amplitude of the sum of a multiple number of analog signals ofdifferent predetermined frequencies, said frequencies being selectedsuch that said samples collectively correspond to a different integernumber of cycles for each of said signals, address counter meansconnected to said memory for successively addressing said storagelocations, a clock connected to control said address counter means,digital-to-analog converter means connected to said memory forconverting said samples into an analog signal which is substantiallyequivalent to said sum of said signals, and capacitative smoothing meansconnected to the output of said digital-to-analog converter means forsmoothing the analog signal output of said digital-to-analog convertermeans.
 2. Signal generator apparatus in accordance with claim 1, whereinsaid memory is a read only memory.
 3. In a railway communication systemof the type in which a train carries an on-board transmitter connectedfor transmitting multiple analog signals of different frequencies into atrackway and an on-board detector connected to detect the signalstransmitted into the trackway, and in which contact ramps are disposedalong the trackway and connected thereto by respective resonant circuitsfor shunting the on-board detector at one or more of the predeterminedfrequencies in order to convey a message to the train,the improvementwherein said transmitter has a signal generator comprising: a pluralityof parallel-connected branches each having a memory with storagelocations storing, in digital form, successive samples of the amplitudeof the sum of a respective group of said signals, the frequencies of thesignals of said group being selected such that said samples collectivelycorrespond to a different integer number of cycles for each signal ofsaid group, address counter means connected to said memory forsuccessively addressing said storage locations, and digital-to-analogconverter means connected to said memory for converting said samplesinto an analog signal substantially equivalent to said sum of thesignals of said group, a clock connected to control the address countermeans of said branches, the outputs of the respective digital-to-analogconverter means of said branches being connected together and jointlyproviding an analog signal output which is substantially equivalent tothe sum of said multiple analog signals, and capacitive smoothing meansconnected to the outputs of the respective digital-to analog convertermeans for smoothing the output signals of the respective digital-toanalog converter means.
 4. The improvement of claim 3, wherein saidcapacitive smoothing means comprises a smoothing capacitor, and whereineach branch includes a resistance connecting the output of thedigital-to-analog converter means of that branch to a terminal of saidsmoothing capacitor and to the input of an amplifier.
 5. The improvementof claim 4, wherein said branches are two in number.
 6. The improvementof claim 5, wherein each of said groups of signals is composed of 16signals of different frequencies.